Toshiba today brought out its first instance of double data rate, toggle mode (DDR) NAND flash memory in a bid to improve speeds across the board. The 32 nanometer multi level cell (MLC) and single level cell (SLC) chips have a much faster interface than usual and can shuttle more data, even compared to a traditionally fast SLC chip. DDR toggle mode memory makes up to 133 million transfers per second, or more than three times the 40 million transfers SLC has usually managed.
The new technique could at the same time lower the power consumption than other performance-driven chips. It can still work asynchronously like most flash memory and doesn't need a clock to keep data moving smoothly. Toshiba vows that performance could get even faster with the second generation of toggle mode memory at up to 400 million transfers.
Ship times weren't mentioned by the Japanese firm, but it will have 32, 64 and 128 gigabit (4GB, 8GB and 16GB) capacities. The company expects it to reach "high performance" uses of flash, which often include SSDs, though media players, smartphones and tablets also regularly need fast, sustained access.
Via : ElectronistaToshiba Introduces Double Data Rate Toggle Mode NAND in MLC and SLC Configurations
IRVINE, Calif., Aug. 11 /PRNewswire/ -- Toshiba America Electronic Components, Inc. (TAEC)* is introducing 32nm double data rate Toggle Mode NAND, in multi-level cell (MLC) versions with densities of 64Gb(1), 128Gb and 256Gb and single-level cell (SLC) versions with densities of 32Gb, 64Gb and 128Gb. Toggle Mode NAND features a faster interface than conventional or "legacy" asynchronous NAND memory with lower power consumption than competing synchronous DDR NAND product offerings.
Toshiba DDR Toggle Mode 1.0 NAND has a fast interface rated at 133 megatransfers/second(2) (MT/s), compared to 40MT/s for legacy SLC single data rate NAND, which makes it suitable for high performance solid state storage applications including enterprise storage. Since it uses an asynchronous interface similar to that used in conventional NAND, the Toshiba DDR Toggle Mode NAND requires no clock signal, which means that it uses less power and has a simpler system design compared to competing synchronous NAND alternatives. The DDR interface in Toggle Mode NAND uses a Bidirectional DQS to generate input/output signals (I/Os) using the rising and falling edge of the write erase signal. Toggle Mode NAND also has on-die termination to help achieve less crosstalk.
Scalability to future high-frequency operation is enabled as a result of the bi-directional data signal. Toshiba recently announced a commitment to a new standard for the most advanced high-performance NAND flash memory, a DDR NAND flash with a 400Mbps(3) interface. This next generation Toggle Mode DDR NAND 2.0 is targeted to provide a three-fold increase in interface speed over Toggle DDR 1.0 and a ten-fold increase over the 40Mbps single data rate NAND in widespread use today.
Toshiba Toggle Mode NAND supports common legacy NAND commands including basic, multi-plane and cache operations.
Source: Engadget
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